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I am a PhD candidate at the Integrated 3D Systems group at the department of Electrical and Computer Engineering at Georgia Institute of Technology, where I am advised by Dr. Muhannad S. Bakir. My research interests include studying design challenges in die-to-die signaling, thermal and power delivery in advanced 2.5D and 3D ICs for heterogeneous integration. I received my bachelors in electrical engineering at the R.V. College of Engineering in 2013. I also recieved the JN Tata Endowment for higher education in 2016. During spring 2022, I was an Advanced Packaging intern at AMD, where I worked on pathfinding for the 3D V-cache packaging architecture. I was co-advised by Hemanth Dhavaleswarapu and Rahul Agarwal, and I collaborated with Chandra Mandalapu. During summer 2020, I was a Ph.D. intern with the Advanced Products, Physical IP group at Arm Inc., where I studied design-time power and thermal optimization of scaled 2.5D and 3D multi-core systems. I was advised by Jim Dodrill and I collaborated with Saurabh Sinha and Rahul Mathur . Email / CV / Google Scholar / ORCID / LinkedIn |
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My PhD research focuses on the impact of 3D integration on emerging non-volatile memory device-based compute in-memory (CIM) inference engine models. I also study die-to-die signaling, power delivery, and thermal challenges in 2.5D and 3D integration architectures and explore mitigation techniques. For my research, I leverage analytical techniques for system level modeling of heterogeneous integration architectures. For an updated list of publications, please visit my Google Scholar page. |
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June 2022: I will be presenting my work on "Die-to-die Signaling and Thermal Considerations for 2.5D Integration of Arm-based 7nm High-Performance Systems" as a poster at the 2022 Design Automation Conference on July 13, 2022 at San Francisco, CA.
November 17 2021: I presented a paper on "Thermal Reliability Considerations of Resistive Synaptic Devices for 3D CIM System Performance" at the 2021 IEEE International 3D Systems Integration Conference (3DIC) at Raleigh, NC. Paper
October 2021: I am happy to announce that I will be joining AMD Advanced Packaging as a research intern from Jan. - May 2022 at Austin, TX.
August 2021: My work on "3D polylithic integration and thermal implications on BEOL RRAM performance" was featured in the Chip Scale Review: The Future of Semiconductor Packaging magazine, July-August 2021 issue, page 19. Magazine Link
December 13 2020: I presented a paper on "Thermal modeling of 3D polylithic integration and implications on BEOL RRAM performance" at the 2020 IEEE International Electron Devices Meeting (IEDM) at San Francisco, CA. Paper
June 3 2020: I presented a paper on "BEOL-embedded 3D polylithic integration: Thermal and interconnection considerations" at the 2020 IEEE 70th Electronic Components and Technology Conference (ECTC) at Orlando, FL. Paper |
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Outside work, I enjoy biking, running, hiking, and playing badminton. I log my activities to Garmin Connect that syncs to Strava. I would have preferred embeddeding Gramin Connect but have not found a way so far to embed all Connect activities as an iframe, sadly. Always open to a good game of badminton or table tennis!
I aspire to build the perfect long run playlist! Here's what I have so far: |
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Based on the source code from https://jonbarron.info/. |